In the following discussion on how to proceed, it will be assumed that PlatformIO (PIO for short) is installed and working properly on the desktop, but if not, here are the installation instructions. The sketch was written for the Arduino framework in PlatformIO on a Linux desktop. Indeed, I managed to upload a blink firmware to the device. Since it uses the same microprocessor as the Sipeed Longan Nano, I assumed that programming it would be relatively similar. Furthermore, I cannot find much information about it on the Web, and the vendor does make it clear that the PlatformIO environment is the only currently available playground. There is no support for the board in the Arduino IDE. As far as I can determine, the only connection between the RISC-V core and the ESP core is through a two wire serial connection, USART1 (RX = PA3, Tx = PA2) on the RISC-V side. The SD-card slot is connected with SPI bus 1. Pins PA11 and PA12 are connected to the D- and D+ USB data lines. The blue LED beside the USB-C connector and below the reset push button switch is connected to pin PA8 and is active high. SPI0_MISO, ADC01_IN6, TIMER2_CH0 TIMER0_BRKIN SPI1_NSS, I2S_WS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN, CAN1_RX WKUP, USART1_CTS, ADC0_IN0 TIMER1_CH0_ETI, TIMER4_CH0 I2C0_SMBA, SPI2_MOSI, I2S2_SD TIMER2_CH1, SPI0_MOSI, CAN1_RX USART0_CK, TIMER0_CH0, CK_OUT0, USBFS_SOF The Function column gives the alternate function description of the pin, any function after a " " is a remap function (whatever that means, I obviously have a lot to learn). The labels with the white background are those found on the schematic. Basically they are the pin name and default function of the corresponding core pins as described in section 2.6.3 GD32VF103Cx pin definitions of the data sheet. The labels with the green background next to the pin numbers are those printed on the board. The header numbers correspond to the numbering on the schematic and follow the convention of assigning number 1 to the pin with the square solder mask. Imagine that the board is in the narrow white column in the centre, with the USB-C connector visible and at the bottom (as shown in the left photograph above). Here is my poor attempt at documenting the connections on the board based on the schematic and the GD32VF103 Datasheet (rev 1.1). So far, I have not seen an official pinout. The Wio Core "can be considered equivalent to ESP-WROOM-02 except that the original firmware is replaced with firmware." Pinout a watchdog, a real-time counter/clock (?).7 timers (16 bit) of varying capabilities.The 108 MHz, 32 bit, GD32VF103CBT6 has impressive capabilities. The USB-C connector is used to power the device and to upload new firmware. Since the latter are not breadboard compatible, any installed connector or header should be soldered on the top side. There is a provision for a JTAG connector on the abdomen near the waist and through holes for a Wio Core I/O header are situated above the waist. Hopefully the micro SD slot on the bottom side will not be in the way. Its presence means that header pins should be soldered on the bottom side of the board as done with other Feather boards. In keeping with the Feather standard, there is a JST2.0 Lipo battery port on the top side. The distance between the headers is breadboard compatible. Through holes for standard 0.1" headers along the long edges of the abdomen are connected to the RISC-V core. It resembles a wasp with the ESP8266 being the thorax and a Feather form-factor abdomen carrying the RISC-V processor. The Wio Lite RISC-V is a development board based on a 32-bit GD32VF103CBT6 core by GigaDevice and a ESP8266 Wio core.
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